CHASSISD_FASIC_OUTPUT_DROP The message is generated by the chassis process (chassisd), which controls hardware components on the routing platform. The Packet Forwarding Engine divides packets into smaller units called cells for more efficient processing. As the indicated F chip on the indicated Control Board (CB) processed data before sending it to the indicated Packet … [Read more...]
CHASSISD_FASIC_HSL_LINK_ERROR
On MX routers, this article addresses how to detect CRC errors on High Speed Link (HSL) interconnection between Dense Port Concentrator (DPC)'s Packet Forwarding Engine (PFE) or Flexible Port Concentrator (FPC), midplane connector, and a Switch Control Board (SCB - MX series) or Switch Interface Boards (SIB - T Series) or Forwarding Engine Board (FEB - M120). The … [Read more...]