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You are here: Home / Juniper / Determining a real PowerPC L2 cache parity error

Determining a real PowerPC L2 cache parity error

May 20, 2016 by James Palmer

This article introduces a way to correctly identify a real PowerPC level 2 cache parity error from syslog.

Sometimes we will see level 2 cache parity errors on PowerPC processors, but this might not be a real level 2 cache parity error. This article introduces a way to identify a real PowerPC L2 Cache Parity error from syslog.

You should match two criteria to determine a real PPC L2cache parity error:

1.System exception must be:0x00200
2.The 11 bit must be set in MSR register.
The MSR bits are mapped 0 … 31, so bit 11 is ‘0000 0000 0001 0000 1011 0000 0011 0000’.

Real PPC L2cache parity error example:

System Exception: Vector/Code 0x00200, Signal 11
Event occurred at: May 23 01:46:10.832462

Juniper Embedded Microkernel Version 7.3R2.7
Built by builder on 2005-10-05 18:59:53 UTC
Copyright (C) 1998-2005, Juniper Networks, Inc.
All rights reserved.
Reason string: "L2 cache parity error"
Context: Thread (Periodic)

Registers:

R00: 0x00000000 R01: 0x019796b0 R02: 0x0000339c R03: 0x02a7d7e8 
R04: 0x00000000 R05: 0x019796c8 R06: 0x00000010 R07: 0x00000004 
R08: 0x00000007 R09: 0x00000000 R10: 0x00000064 R11: 0xc0001400 
R12: 0x80002022 R13: 0x75823331 R14: 0x2838c624 R15: 0xb4a2dc0d 
R16: 0x2db8099b R17: 0xfef436f2 R18: 0xcc44cf67 R19: 0xa71adebf 
R20: 0x5c9a6ce8 R21: 0xea32acac R22: 0x000000ff R23: 0xffffff80 
R24: 0x00000000 R25: 0x019796c8 R26: 0x02a7d7e8 R27: 0x02a7dc88 
R28: 0x02a7d9f8 R29: 0x02a7d7e8 R30: 0x00000000 R31: 0x00000000 
MSR: 0x0010b030 CTR: 0x00000000 Link:0x00161600 SP:  0x019796b0

False PPC L2cache parity error example:

 System Exception: Vector/Code 0x00100, Signal 11
 Event occurred at: Feb 14 12:49:46.895667

 Juniper Embedded Microkernel Version 8.5B4.1
 Built by builder on 2007-11-14 05:14:31 UTC
 Copyright (C) 1998-2007, Juniper Networks, Inc.
 All rights reserved.
 Reason string: "Critical Exception"
 Context: Thread (Idle)
 CPU L2 Cache Error (0x4): Single-bit ECC errors exceed threshold
   attributes 0x22912001
   at addr 0x00022780, data 0x8001001c901f0138
   ECC syndrome 0xcd, ECC checksum 0x1
   single-bit threshold 25

Registers:

Registers:

 R00: 0x7c0803a6 R01: 0x40c9b908 R02: 0x40c9b16c R03: 0x00000001
 R04: 0x001588b7 R05: 0x40b10000 R06: 0x40b15050 R07: 0x40c9bb54
 R08: 0x40c9b9c4 R09: 0x0000003e R10: 0x40c9b9c4 R11: 0x0000043e
 R12: 0x28002044 R13: 0x00000000 R14: 0x00000000 R15: 0x00000000
 R16: 0x00000000 R17: 0x00000000 R18: 0x40b10000 R19: 0x40b10000
 R20: 0x40b10000 R21: 0x40b10000 R22: 0x00000000 R23: 0x0014dcc0
 R24: 0x00000000 R25: 0x0015967c R26: 0x00000000 R27: 0x001582f4
 R28: 0x00000001 R29: 0x40b10000 R30: 0x4002c000 R31: 0x400227c0
 MSR: 0x00021200 CTR: 0x00000000 Link: 0x40036b88 SP: 0x40c9b908 
  CR: 0x28002088 XER: 0x00000000 DEAR: 0x00000000 PC: 0x40036ba4
 ESR: 0x00000000 K_MSR: 0x00001000

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Filed Under: Juniper Tagged With: L2 cache parity error, real PowerPC, real PowerPC L2 cache parity error

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